Cyrix
| Model | Clock | Cores | Architecture | Submissions |
|---|---|---|---|---|
| 120 MHz | 1x GX | x86 (32bit CISC) | ||
| 133 MHz | 1x GX | x86 (32bit CISC) | ||
| 150 MHz | 1x GX | x86 (32bit CISC) | ||
| 166 MHz | 1x GXi | x86 (32bit CISC) | ||
| 180 MHz | 1x GXi | x86 (32bit CISC) | 3 SUBS | |
| 200 MHz | 1x GXi | x86 (32bit CISC) |
| Model | Clock | Cores | Architecture | Submissions |
|---|---|---|---|---|
| 120 MHz | 1x GX | x86 (32bit CISC) | ||
| 133 MHz | 1x GX | x86 (32bit CISC) | ||
| 150 MHz | 1x GX | x86 (32bit CISC) | ||
| 166 MHz | 1x GXi | x86 (32bit CISC) | ||
| 180 MHz | 1x GXi | x86 (32bit CISC) | 3 SUBS | |
| 200 MHz | 1x GXi | x86 (32bit CISC) |