Marvell - XScale - PXA920
| Model | Clock | Cores | Architecture | Submissions |
|---|---|---|---|---|
| 1000 MHz | 1x Marvell Sheeva | ARMv5 (32bit RISC) | ||
| 624 MHz | 1x Marvell Sheeva | ARMv5 (32bit RISC) | ||
| 806 MHz | 1x Marvell Sheeva | ARMv5 (32bit RISC) | ||
| 1000 MHz | 1x Marvell Sheeva | ARMv5 (32bit RISC) | ||
| 800 MHz | 1x Marvell Sheeva | ARMv5 (32bit RISC) |